Key Takeaways
- New approaches are being devised and tested to address the talent shortage.
- Leveraging AI in design tools will help engineers become more efficient, and potentially could reduce the time it takes to train engineering students.
- EDA companies are looking at whether it’s possible to train computer science and software engineers to become hardware engineers.
A variety of new approaches are being developed and tested to address the talent shortage in the chip industry, from wider deployment of AI tools to cross-training engineers graduates outside of their core study area.
On the AI front, new tools can pick up some of the slack by helping engineers design and verify semiconductor hardware more efficiently. Large language models and natural language agentic AI tools can be trained to serve as customized assistants. This technology will continue to develop, morph, and overlap in a cycle, as more advanced chips are needed to power the AI being used to help design the chips.
Academia, meanwhile, is experimenting with a variety of different approaches to fill the talent gap, from shorter and more intensive training and cross-training, to using machine learning tools, large language models, multi-agentic, and mix-of-experts AI to train software engineers to do the job of hardware engineers? Teaching software engineers how to design hardware could be possible, but it is not easy.
“There would still need to be some education, some job training,” said Matthew Graham, senior group director, verification software product management at Cadence. “There has to be some fundamental understanding of what the AI is doing, or any solution is doing, to interact with it. But would those people need to be experts in writing RTL? No. Maybe chip developers will no longer need to learn how SystemVerilog works or how VHDL works. Or they’ll have some fundamental understanding, in the same way that people writing C programs, or C++, or Python, or any one of the thousand languages that are out there. They all fundamentally understand that the compiler creates assembly code and machine code. They don’t actually do it. They don’t have to do it. And they don’t really have to be good at it. They just have to fundamentally understand that when they write this code, these things happen under the hood.”
In the future, chip developers and verification engineers will have different skills from those that engineers have today. “It will be closer to what a software engineer does,” said Graham. “If we go back 25 years when I started my career, I was doing IC development and very quickly became a verification engineer because I learned object-oriented programming. It was one of the first classes of electrical engineers in which object-oriented programming was part of not only the computer engineering curriculum, but also the electrical engineering curriculum. When the predecessors of SystemVerilog came along — Specman e and Vera — they said, all these hardware engineers that are writing RTL, none of them have any idea how to use this technology. So you, Mr. Electrical Engineer, who happens to have a few classes in software engineering, can now become a verification engineer, because that’s the skill we need. The same thing is going to happen. There is going to be an additional software component. Will we exclusively take software engineers and not train them at all, and they’ll be able to generate hardware? I doubt it. There’s still some specific domain knowledge that’s required.”
Traditional hardware design, especially at the RTL or circuit level, requires a deep understanding of digital logic, timing, verification, and often analog concepts. “The toolchains and workflows are typically more complex and less abstracted than most software environments,” said Anand Thiruvengadam, senior director of product management at Synopsys. “Hardware development involves considerations like physical constraints, synthesis, timing closure, and manufacturing processes, which are not usually part of a software engineer’s background.”
However, new tools are enabling higher-level abstractions, and some new tools and platforms allow hardware to be described at a higher level — closer to software engineering paradigms. “For example, some systems allow hardware functionality to be specified in high-level languages or graphical interfaces, which are then automatically synthesized into hardware descriptions,” Thiruvengadam said. “AI-powered tools can help automate many low-level details of hardware design, such as generating testbenches, optimizing layouts, or suggesting design improvements. This makes it easier for those without deep hardware expertise to contribute meaningfully.”
Kexun Zhang, head of research at ChipAgents and PhD student at Carnegie Mellon University, believes we will still need hardware engineers to design good chips, because the progress and large-scale adoption of AI is much larger and much more advanced in software engineering than in chip design. “We’re seeing fewer entry-level, junior engineers,” he said. “Software engineers with lots of experience are valued because AI essentially is a tool. You can do greater things with better tools, but you still need the person who’s using the tool to understand the problem well in order to architect whatever they’re designing.”
Like most things today, chip designers are using AI to try to save time. “How can I get the tool to work faster for me, instead of having to read every part of the documentation?” said Nandan Nayampally, chief commercial officer at Baya Systems. “Can I ask the tool what I need, and it will tell me what I need to do? As we start spec’ing, can AI give me a good starting point? If it gives me a starting point, then the system design can be done a lot faster. And if it gives me more guidance as I go along, it can help the design to be more efficient. That’s how designers are looking at AI. Can it make small, generic systems? Can it make simple starting points that are efficient enough and not worth optimizing further? Probably, but it’s not there at the moment. Right now, it’s more about understanding the tool much better, understanding the capabilities with a great starting point, and then optimizing faster as it’s trying to reduce the design cycle and improve time to market.”
How to get software engineers to design hardware
Jason Cong, distinguished professor of computer science at UCLA, has been working on this problem for the past couple decades.
“We have about 2 million people who claim they are software developers,” said Cong, citing U.S. Bureau of Labor statistics at DAC[1]. “I assume they make a living from software programming. Less than 100,000 are hardware designers. I cannot find a category called IC designers, so I just lump everything.” These rough figures indicate a ratio of more than 20 software engineers for every hardware engineer.
Cong and his team have published many technical papers on steps to enable software engineers to design hardware, and he reached this conclusion in his presentation: “One part of the message is that carefully engineering the AI/ML tools can definitely help chip design. I showed you how we combine GNNs with LLMs, the capture design hierarchy, program transformations, task transfer from FPGA to ASICs, and domain transfer using a mix of experts.”
Fig. 1: Steps to get software engineers designing chips. Source: DAC 62 Day 3 Keynote: “Democratize Chip Design –– with Deep Learning and Automated Code Transformation.”
The outlook is to have a multi-agent-based approach that combines machine and human intelligence. “My goal is very clear, I want to enable this young lady trained in software programming to be able to do chip design,” Cong noted. The measure of success will be when hardware design is just as easy as writing another PyTorch library. “We have some success with the course I’m teaching, undergraduate CS-133. In one-and-a-half weeks they are using high-level synthesis and can design a CNN accelerator in AWS F1 cloud.”
Fig. 2: A multi-agentic approach of designing hardware with software. Source: DAC 62 Day 3 Keynote: “Democratize Chip Design –– with Deep Learning and Automated Code Transformation”
Others agree that agentic AI is the best way to get engineers to do new tasks faster, with a data lake connected to their previous design work or projects, or anything else with internal data. “The more data you feed it, the more it knows exactly what to do,” said Sathishkumar Balasubramanian, head of products at Siemens EDA. “Let’s say you’re doing a design, and you found a problem. You make sure you understand this is the problem. The system understands that’s the problem. Next time you get into it, ideally, it should give you a prompt saying, ‘You’ve seen that when you use this tool, there’s a potential that you’re going to hit the problem down the road. What do you think?’ And the user says, ‘You’re right. I did it six months back.’ Or someone in India did it, or someone in Munich did it, and then it tells you that so you can call that guy. ‘This is what happened. This is how you need to solve it.’ The tools make it easy, and the knowledge is universal. It’s more conversational, not really appropriate syntax or a database or a language you need to know, but it goes back to fundamental science.”
However, Cong issued a note of warning. “We are very passionate about using AI/ML for chip designs, but I want to caution that that’s not the only way, and in fact, I don’t recommend it, using our way,” he said. “I think when human intelligence prevails, let’s always use human intelligence instead of artificial intelligence.”
Getting access to CS and EE talent
With the EDA industry evolving quickly, and hardware-software co-design being more important than ever, it can be hard for students to know which degree to choose, and for companies to know which degrees to hire.
“The skill shortage is well understood and real,” said Alexander Petr, senior director at Keysight EDA. “It’s been real for a long time. Finding qualified people is hard. Universities have moved away from training the skills that we want in the industry to chasing the latest and greatest and fanciest technology, but it’s not what we need. This often means you hire people who you have to upskill while on the job. With that as a foundation as a starting point, when we talk about AI the question is, ‘What are we trying to do?’”
Petr believes there are enough graduates in all domains, including electrical engineering and computer science, but the specializations are disconnected from what the industry needs. Keysight is following two hiring trends. “Either we hire good CS people who have the basic understanding of EE, and we train them to become good engineers, or we hire good engineers who are good in CS, and we try to upskill them on the CS side. As such, you can also look at this from the point of view of taking a person and enhancing them with AI capabilities. You’re making them way more productive, but it’s still an enhancement. It’s still an automation. It’s the next evolution, so it’s not a replacement [for a person]. I don’t see that.”
When it comes to talent, startups that are formed out of a university have an advantage in that they get access to students and graduates. For example, ChipAgents was formed out of the University of California at Santa Barbara, where CEO William Wang was an AI professor for nine years and is currently on leave. When he formed ChipAgents, 80% to 90% of the team came from UCSB. “This is a very standard startup setting in the industry,” said Wang. “Broadcom comes from UCLA, Qualcomm came from UC San Diego, and Cadence came from Berkeley. When Aart [de Geus] started Synopsys, he took six summer students right from GE (General Electric).”
Hiring in the San Francisco Bay Area is tough because there are so many competitors, and salaries are extremely high. In the past, some of Wang’s best UCSB students have gone to Stanford to do a master’s when they graduate, and some of the best AI PhD students joined Meta, Google, or Amazon. “They would leave. But now we have a company with an office. They graduate and join ChipAgents. We’re able to hire and attract some of the best students. We’re holding an Information Session, and 200 students signed up.” He also finds students through referrals and word of mouth.
ChipAgents looks for people with various degrees. About 50% come from computer science (CS) and AI, while 30% to 40% come from computer engineering (CE) and electrical and computer engineering (ECE).
The company also employs senior engineers with chip design and verification backgrounds who have worked at companies such as AMD, doing integrated circuit design tasks. “This talent comes from our advisory board,” said Wang. “We recently hired three very senior EDA veterans. They give us a lot of guidance on a weekly basis, and that is deeply helping us in terms of expertise in EDA. On a day-to-day basis, we need a CS background and an AI background to build AI-first, AI-native solution software. Meanwhile, getting guidance from the advisory board with deep, 20, 30, 40 years of experience in EDA is a great combination.”
BS, MS, PhD, or startup job?
A Bachelor of Science degree student learns fundamentals, where a Master of Science degree adds something new to what already exists. A PhD creates something brand new, which may be more suited to long-term moonshot programs than current technology markets.
“In an ideal case, [a PhD] will do research into an area that the industry may want,” said Keysight’s Petr. “But that goes back to how the professor is funded. What infrastructure have they built around it? If an analog designer has built something like terahertz amplifiers, your phone doesn’t need a terahertz amplifier. Data centers currently don’t need terahertz, so even if they finish their PhD thesis and they come out, most of the stuff will take half a decade to hit industry, best case. If they’ve done a really good collaboration with a company or with the industry, they build something the company wants to implement as soon as possible. But how often does that happen?”
Technology cycles also may impact whether an undergrad student chooses to do an MS or PhD, defer or pause graduate studies, or take a job right away.
“When I was doing my PhD, there was no ChatGPT. Everything was wide open,” said ChipAgents’ Wang. “There were a lot of open problems in natural language processing. Machine translation at the time was not solved. Information extraction was not solved. A lot of people were working on vision language, which was 10 years ago. Now, things are different. If you look at natural language processing, most of the problems are solved. Nobody is working on machine translation anymore. Nobody is working on information extraction. So in this particular industry cycle, the research topics are wide open. It’s a great time to do a PhD right now.”
In this particular wave, whether it’s in software or semiconductor engineering, startups are taking the lead. “Open AI and Anthropic, in software engineering, are taking the lead,” said Wang. “Hardware engineering startups like ChipAgents showed up recently. It’s a really exciting time to do cutting-edge research and development work at startups. In this wave, there’s a lot of emphasis on how practically you can apply your knowledge to the advances of technology, rather than requiring a PhD to write some paper to be able to make something happen.”
Shortening university curricula
Universities are already tasked with trying to keep up with fast-changing chip technology, and now must also consider AI. Some organizations are looking at shortening the time needed to complete a degree. Whether that would work for engineering — shortening education timelines — is unclear.
“The entire stack is going to move up, without a doubt, but I don’t know that the education component will be reduced,” Cadence’s Graham said. “It will need to change. University programs have historically lagged significantly.”
Educational institutions are doing a better job of being relevant now than they were in the past, as they’re more connected to the larger parts of industry rather than the commercial parts. “The programs will necessarily move and be better aligned with what’s going on in industry, and be able to move more quickly. They also will produce better graduates — and that’s the key, rather than shorter,” Graham noted.
Others agree that it is not as useful to reduce study time as it is to do more in that time. “I find it very interesting, especially where safety is concerned, because the overarching drive there is we want to do more with less,” said Andrew Johnson, engineering and technology leader, systems and functional safety engineering specialist at Imagination Technologies. “Let’s go back to the example of, ‘We need to train young engineers doing degrees and wouldn’t it be great if we could use machine learning to reduce class time down from three years to two years, or whatever it is?’ Isn’t that interesting in itself? Why shouldn’t we stick to three years and do more in those three years to get more value out of that? Then we’ve got a higher caliber of engineers being graduated with the support of machine learning tools. But it’s human nature to try to take the shortcut.”
Conclusion
With all of the upheaval that AI has brought to semiconductor development, what message can universities send out to encourage students to sign up for electrical engineering, computer science, and all the other disciplines needed in the semiconductor industry?
“In theory, as AI agents get better, that person designing hardware could be a software engineer,” said Andy Nightingale, vice president of product management and marketing at Arteris. “It’s not far off, but at the moment, there still needs to be somebody to make sure that the output being generated is in the correct format and doing the job correctly. There shouldn’t be a fear of AI coming in to replace people’s roles. It should be a fear of people knowing how to drive AI effectively coming in to replace their roles. There’s always that human element, whether it’s software engineering or hardware engineering. Somebody needs to be there as the quality check, the quality gate, before things get committed.”
Reference
[1] DAC 62 Day 3 Keynote: “Democratize Chip Design — with Deep Learning and Automated Code Transformation”
Related reading
Even With AI Inroads, Human Chip Designers Still Essential
Engineers are still needed at key points throughout the design pipeline.
The Limits Of AI’s Role In EDA Tools
AI is a set of algorithms capable of solving problems. But how relevant are they to the tasks that EDA performs?
How AI Will Impact Chip Design And Designers
How AI is reshaping EDA, and how it will help chipmakers to focus on domain-specific solutions.
Best Options For Using AI In Chip Design
Narrowly defined verticals offer the best opportunities for AI. Plus, what will the impact be on junior engineers?
AI’s Value In Chip Design Depends On Data Availability
AI can help engineers do their jobs better, but results can vary greatly by area of expertise and company size.
Reducing The Expertise Required For Software Developers To Participate In Chip Creation
A new technical paper titled “A Vertically Integrated Framework for Templatized Chip Design” was published by researchers at the University of Southern California.